1. Field of the Invention
Generally, the subject matter disclosed herein relates to the field of manufacturing integrated circuits, and, more particularly, to planarization process techniques including a mechanical and a chemical removal mechanism used for the formation of advanced micro-structure devices, such as the metallization structures, including fragile dielectric materials.
2. Description of the Related Art
Typically, the fabrication of modern integrated circuits requires a large number of individual process steps, wherein a typical process sequence involves the deposition of conductive, semiconductive or insulating layers on an appropriate substrate. After deposition of the corresponding layer, device features are produced by patterning the corresponding layer with well-known means, such as photolithography and etching. As a consequence, by patterning a deposited layer, a certain topography will be created that also affects deposition and patterning of subsequent layers. Since sophisticated integrated circuits require the formation of a plurality of subsequent layers, it has become standard practice to periodically planarize the surface of the substrate to provide well-defined conditions for deposition and patterning of subsequent material layers. In other situations, any unwanted material may have to be removed, wherein typically used etch techniques may be less appropriate. This holds especially true for so-called metallization layers in which metal interconnects are formed to electrically connect the individual device features, such as transistors, capacitors, resistors and the like, to establish the functionality required by the circuit design.
In this situation, chemical mechanical planarization (CMP) has become a widely used process technique for removing unwanted material and reducing “imperfections” in the substrate topography caused by preceding processes in order to establish enhanced conditions for a subsequent process, such as photolithography and the like. The polishing process itself causes mechanical damage to the polished surface, however, in an extremely low range, i.e., at an atomic level, depending on the process conditions. Although CMP processes are widely used techniques within the entire manufacturing flow for producing sophisticated micro-structure products, these processes are also associated with a plurality of side effects that have to be addressed to be applicable to processes required for forming sophisticated semiconductor devices.
For example, recently, the so-called damascene or inlaid technique has become a preferred method in forming metallization layers, wherein a dielectric layer is deposited and patterned to receive trenches and vias that are subsequently filled with an appropriate metal, such as aluminum, copper, copper alloys, silver, tungsten and the like. Since the process of providing the metal may be performed as a “blanket” deposition process based on, for instance, electrochemical deposition techniques, the respective pattern of the dielectric material may require a significant over-deposition in order to reliably full narrow openings and wide regions or trenches in a common process. The excess metal is then removed and the resulting surface is planarized by performing a process sequence comprising one or more mechanical polishing processes, which also include a chemical component and/or an electro-chemical component. Chemical mechanical polishing (CMP) has proven to be a reliable technique to remove the excess metal and planarize the resulting surface to leave behind metal trenches and vias that are electrically insulated from each other as required by the corresponding circuit layout. Chemical mechanical polishing or electrochemical mechanical polishing typically requires the substrate to be attached to a carrier, a so-called polishing head, such that the substrate surface to be planarized is exposed and may be placed against a polishing pad. The polishing head and polishing pad are moved relative to each other by usually individually moving the polishing head and the polishing pad. Typically, the head and the pad are rotated against each other while the relative motion is controlled to locally achieve a desired material removal. During the polishing operation, typically, a slurry that may include a chemically reactive agent and possibly abrasive particles is supplied to the surface of the polishing pad.
Typically, the removal rate may be determined by process parameters, such as the relative speed of the surface to be polished and the polishing pad, the down force with which the substrate is pressed against the polishing pad, the type of slurry used and the mechanical characteristics of the polishing pad in combination with any abrasive particles provided in the pad and/or the slurry. Generally, chemical mechanical polishing is a highly complex process, wherein, in addition to controlling the above-specified process parameters, the continuously varying state of the polishing pad may also have to be taken into consideration in order to obtain the desired process output. Moreover, with increasing diameter of the respective substrates, which may be 300 mm in advanced semiconductor facilities, the resulting profile after the polishing process may vary due to certain process fluctuations, such as the locally varying state of the polishing pad, fluctuations during the slurry supply and the like. Consequently, sophisticated process control mechanisms have been established in an attempt to address the above-specified problems, wherein, for instance, the relative speed and the down force may be used as efficient parameters for controlling the polishing process. For example, in a typical polishing regime, a substantially linear dependence between the removal rate and the downward force and the substrate's linear velocity relative to the polishing pad may exist. Consequently, based on this process regime, the overall polishing rate may be controlled, wherein, by locally varying one of the above-identified parameters, a desired polishing profile across the substrate may be achieved. Hence, process inherent non-uniformities may be compensated for by appropriately adapting the local removal rate, and also any process non-uniformities of a preceding process step, for instance, the deposition of a specific material, may be taken account by appropriately adapting the local removal rate during the CMP process. In order to locally adjust the removal rate, for instance, the down force may be appropriately adjusted, for instance, by providing respective pressure zones in the polishing head, which may result locally in a different effective down force, thereby, however, requiring a certain degree of mechanical stability of any materials located below the material layer under consideration.
With the advance of semiconductor technology, so-called low-k dielectric materials are increasingly used in combination with highly conductive metals, such as copper, in order to further enhance the overall performance of respective semiconductor devices. In this respect, low-k dielectric materials are to be understood as insulating materials having a relative permittivity of 3.0 and less, while, recently, even so-called ultra low-k dielectrics have been introduced with a dielectric constant of 2.5 and less. However, the reduced relative permittivity is typically associated with a reduced mechanical stability of the corresponding materials, thereby resulting in highly fragile dielectric layer stacks, from which excess material, such as copper, has to be removed, for instance, by CMP. Due to the reduced mechanical stability of sophisticated dielectric materials, however, the down force during the polishing process may have to be increasingly reduced to an amount that is compatible with mechanical characteristics of the low-k dielectrics. This may, however, require, according to the above-specified linear dependency of the removal rate on the down force and the linear velocity, a respective increase of the speed of the relative motion between the polishing pad and the substrate. However, a respective increase of the relative motion may not necessarily translate into a higher removal rate in this polishing regime using extremely low down forces and, hence, in addition to a loss of process controllability, process efficiency may be reduced. Furthermore, other parameters such as the slurry flow and the like may be controlled in addition to the platen speed or the head speed, wherein, however, a highly complex mutual interaction of these parameters may require the development of highly complex process recipes, which may be difficult to be controlled in a feed forward or feedback regime, thereby contributing to reduced overall controllability and also to an increased probability of creating additional yield loss.
In view of this situation, electrochemical mechanical planarization or polishing processes may provide enhanced process conditions for removing excess metal from corresponding surface areas. During an electrochemical planarization process, an appropriate electrolyte solution may be provided in addition to or alternatively to a chemically reactive slurry material, and a voltage is established across the substrate surface to be treated and a corresponding cathode, wherein the electrolyte may thus establish the electrical contact between the contact surface and the cathode. Consequently, upon establishing a current flow from the substrate surface to the cathode via the electrolyte solution, increasingly, metal ions of the substrate surface may be dissolved, thereby maintaining a continuous material removal. Furthermore, due to the mechanical interaction between the polishing pad and the metal surface, pronounced surface topographies may be planarized in a highly efficient manner, similarly to the chemical mechanical polishing process. It turns out, however, that the required down force may be significantly lower compared to well-established CMP techniques, for instance for removing excess copper of sophisticated metallization systems, thereby contributing to enhanced production yield and superior reliability of the finally obtained metallization system. Furthermore, compared to conventional CMP strategies, a significantly reduced defect rate may be observed during the electrochemical polishing or planarization process, thereby making the electrochemical planarization process a promising process technique for sophisticated microstructure devices in which, frequently, metal-containing surface areas have to be planarized.
In conventional electrochemical planarization systems, a polishing pad may be provided that may have a conductive surface, which may be connected to the anode of the system in order to electrically connect the anode with the metal-containing surface to be treated. Moreover, corresponding holes may be provided in the polishing pad, for instance extending through the conductive layer and through an insulating sub pad to a conductive pad base layer that acts as a cathode, according to a specified pattern so as to establish electrical contact between the anode and thus the substrate surface to be polished and the cathode, i.e., the pad base layer. During the processing of a substrate, a current flow from the anode, i.e., the substrate surface, to a cathode may be established which may be accomplished via the electrolyte solution in the holes provided in the polishing pad, wherein, however, a desired polishing result may significantly depend on the overall process conditions and the status of the electrolyte in the holes. That is, during the processing, increasingly, metal residues and any other components of the polishing pad may be accommodated by the electrolyte in the holes, wherein these contaminants may result in a reduced electrolyte performance within the holes extending through the a portion of the polishing pad to the conductive pad base layer. Consequently, a state of the increasingly “exhausting” electrolyte may sensitively depend on the process history and may thus result in a significant process variability, unless well-defined process conditions may be restored for each substrate to be treated. For this reason, typically, the polishing pad may be rinsed, for instance on the basis of de-ionized water under high pressure, to remove any contaminants within the holes in the polishing pad, and also the corresponding electrolyte solution may be discharged and may thus be replaced by a fresh electrolyte solution.
As a consequence, although electrochemical planarization presents a promising approach for planarizing metal-containing surface areas and removing excess metal, such as copper, many of the advantages, i.e., the usage of cost-efficient electrolyte solutions instead of sophisticated chemically active slurries, enhanced defect rate and the like, may be offset by the requirement of frequent cleaning of the polishing pads and the replacement of the electrolyte solution, thereby reducing throughput and increasing cost of ownership.
The present disclosure is directed to various methods and devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.